Re: How to develop a random number generation device

On Sun, 16 Sep 2007 19:59:38 -0700, MooseFET <kensmith@xxxxxxxxx>
wrote:

On Sep 16, 6:16 pm, krw <k...@xxxxxxxxxx> wrote:
In article <1189967601.928633.242...@xxxxxxxxxxxxxxxxxxxxxxxxxxx>,
kensm...@xxxxxxxxx says...

On Sep 15, 11:09 am, John Larkin
<jjlar...@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:
[....]
architecture. In a few years we'll have, say, 1024 processors on a
chip, and something new will be required to manage them. It will be a
thousand times simpler and more reliable than Windows.

I think that the number of virtual cores will grow faster than the
number fo real cores. With extra register banks and a bit of clever
design, a single ALU can look like two slightly slower ones.

Not register banks, just a couple of bits in the rename register
files.

I think you mistook my point. You would have as many set of registers
as there are virtual CPUs, perhaps plus some. When a task hits a
point where it needs to wait, its ALU section starts doing the work
for the lower priority task. This could be all hardware so no context
switching time other than perhaps a clock cycle would be needed.

Right. Move a lot of the functionality of the OS into hardware.
Whether the 1024 CPUs are real hardware or pipeline tricks, similar to
multithreading, we can count on the hardware to work right.

John



.