Re: heatsinking a thermal padded IC ?
- From: miso@xxxxxxxxx
- Date: Thu, 27 Sep 2007 12:30:35 -0700
On Sep 25, 1:53 am, Adam S <not.valid@nosuchaddress> wrote:
Are you familiar with the on-chip diode method to measure die
temperaure? If not, I'll write it up.
Yes, I'd interested. Assuming I find a diode , it'll need to be measured
during power up. As John Devereux pointed out, a forward biased ESD
protection diode on one of the logic inputs may be my only option.
Is it necessary to do a two point temperature calibration and
extrapolate Vd vs T with the diode equation ?
I'd like to know what you learned from this experiment.
Years ago, one of the apps engineers at Maxim took a chip that
depended on power supply copper to cool it. He put in on a large PCB
and kept cutting back the amount of attached copper with a dremel.,
yielding theta JA versus attached copper. I don't think it ever left
the company. Yeah, this isn't the same as the internal copper slug,
but a similar experiment might be useful.
To really get good thermal flow from the pins, the chip need fat bond
wire. [Flow proportional to the cross sectional area of the wire, so a
little thicker wire is a big deal.] Generally the factory doesn't
provide that kind of information.
.
- References:
- heatsinking a thermal padded IC ?
- From: Adam S
- Re: heatsinking a thermal padded IC ?
- From: John Larkin
- Re: heatsinking a thermal padded IC ?
- From: Adam S
- Re: heatsinking a thermal padded IC ?
- From: miso
- Re: heatsinking a thermal padded IC ?
- From: Adam S
- heatsinking a thermal padded IC ?
- Prev by Date: Re: Low end desktop for EE tasks?
- Next by Date: Re: What do You think about that
- Previous by thread: Re: heatsinking a thermal padded IC ?
- Next by thread: Re: heatsinking a thermal padded IC ?
- Index(es):
Relevant Pages
|