Re: breadboarding picosecond stuff

On Wed, 09 Jan 2008 15:03:58 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@xxxxxxxxxxxxxxx> wrote:

On Wed, 09 Jan 2008 13:44:52 -0800, John Larkin
<jjlarkin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:


I'm testing an MC10EP16VS part, a fast si-ge ecl buffer that has
programmable output swing. A simple copperclad breadboard works very
well, with fairly clean 200-or-so ps edges. The end-of-step drool is
fairly common on very fast stuff, which is why lots of people specify
20-80 percent risetimes, instead of the more common 10-90, for really
fast edges. It may get a little better on a real pc board.

ftp://66.117.156.8/P_Benchtop.jpg

ftp://66.117.156.8/P_Closeup.jpg

ftp://66.117.156.8/P_RiseFall.jpg


The other circuit, lower-left, is a gaasfet thing that was interesting
but didn't work very well.

John


The "drool", as you call it, is probably due to the chip using
resistors instead of current mirrors... ala VERY OLD style ECL.

...Jim Thompson


This is an ONsemi EclipsPlus, silicon-germanium part, pretty recent
stuff. The drool could be skin effect on wirebonds and leads maybe?
Just running out of Ft on the output transistors? This usually happens
on rising edges when the ecl emitter is sourcing a lot of current into
a termination.

The circuit is roughly....


Vcc-------------+-------+
| |
Rup |
| |
| c
+------b
| e
| |
c |
--b |
e +---------- out
| |
|
Rterm = 50r
|
|
|
gnd

Where Vcc = +2.5, Vee = -2.5. The lower npn turns off, and Rup pulls
the output gadget base up to about Vcc, and "out" jumps up to about
Vcc-0.8 maybe. The output transistor is almost saturated (Vce = 0.8)
and it's driving the termination resistor hard, it's running out of
Ft, and Ccb is max'd out. No wonder it drools; I sure would.

Why didn't they put an inductor in series with Rup? Lazy bums, a mere
10 nH or so is all it would take.

John

.