Re: fet rise/fall times
- From: "Kevin Aylward" <none@xxxxxxxx>
- Date: Sun, 03 Feb 2008 10:20:49 GMT
Jamie Morken wrote:
Hi,
What determines a fet's ie. 650V n channel like this one:
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=IPP60R099CPIN-ND
rise and fall times?
I usually look at total gate charge to find fet driver current
requirements for switching losses, and Rds(on) for on-time power
losses, but haven't figured out the relationship between rise/fall
times and these or other parameters.
I think rise and fall times must be proportional to the total gate
charge and the gate drive currents, but it seems that maybe some
fets have a minimum rise/fall time independent of the gate drive
currents maybe.
Sort of. If you drive them with an ideal zero source impedances, i.e. one
that can supply infinite current/charge, the fet will still have a mimimum
on/off time. 1st, there is internal resistance in the gate which will limit
the actuall maximum current possible, and hence speed, i.e. an Rgate.(Cgs +
gain.Cgd) network on the input. 2nd, the output current is limited to
Vgate.gm, and this finite current has to charge the output capacitances of
the device (Cgd, Cdb, Cds, Cload).
--
Kevin Aylward
kaEXTRACT@xxxxxxxxxxxxxxxxxx
www.kevinaylward.co.uk
www.anasoft.co.uk - SuperSpice
.
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