Re: cPLDs and FPGAs we've known and loved (or hated)

"Winfield" <winfieldhill@xxxxxxxxx> schrieb im Newsbeitrag
news:02959da4-a9a6-4c4b-8afc-f6f6cd668a2a@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
We're making the tables for AoE 3rd-ed chapter 11, the
2nd digital chapter, in which cPLDs and FPGAs are
discussed. What are your favorite companies and parts,
the ones you always use, and what are the ones you used
to use but stopped (and why), and what are the parts you
steer clear of? What about cPLD vs FPGAs? Opinions?
What method(s) do you use to design the parts? Thanks!

My favarite company is Xilinx because of leading edge technology since
middle of the eighties.
As an early PAL user i always was excited of the fact, that Xilinx made no
architectural design mistake in their FPGA's, as in Pal, Gal and early
CPLD's (like ALTERA Classic, AMD Mach and Lattice Isp), which had lots of
needless restrictions (pin, product term & logic exceptions).

But also early Xilinx FPGA's had restrictions like internal routability,
logic ressources and system frequency.

Since Virtex, FPGA's grew up and all these resrictions disappeared, and
additional goodies like hard macros (clock conditioning circuits,
comparative large block rams, multipliers, PowerPC's, Ethernet Macs, MGT'S,
PCI-e cores, ADS's etc. etc.) make SOC's (System on a Chip) easy to develop
on your desktop PC or Laptop.

Of course this is not as easy as to prepare a frozen pizza :-), but with
experience and patience, no, lots of patience (and some pricy ip cores),
very complex systems can be designed with little manpower.

Xilinx disadvantages are software quality and limited device package
choices.
ISE Webpack is fairly usable, but EDK is BS++ (Sorry Xilinx, but i really
work with it, and it annoys me every day, every hour, every minute, but
anyhow, the results are usable).

Further disadvantages (not for Xilinx FPGA's only) are missing 5V tolerance
or 5V drivers, and complex power supply requirements.

A few years ago i worked on an ALTERA Stratix project, and IMHO, ALTERA is
the only serious competitor to Xilinx (I don't know the newer Lattice parts
which seem to be great).
ALTERA FPGA's are slightly different, no SLR16's but large Mrams. The
software never made any problems and seems to be better than ISE, but also
has fewer features and a really bad fpga editor.

Actel has nice Proasic3 and Fusion Flash FPGA's, but with 10 times more
marketing gates inside than brand A or X.

CPLD's are not recommended for densities > 144 to 256 macrocells, because
FPGA's are cheaper and more verstaile.

MIKE

--
www.oho-elektronik.de
OHO-Elektronik
Michael Randelzhofer
FPGA und CPLD Mini Module
Klein aber oho !
Kontakt:
Tel: 08131 339230
mr@xxxxxxxxxxxxxxxxx
Usst.ID: DE130097310








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