Re: feeding a FIFO from PCI



On Apr 16, 11:36 am, John Larkin
<jjlar...@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:
On Mon, 14 Apr 2008 23:05:17 -0500, James Waldby <n...@xxxxx> wrote:
On Sat, 12 Apr 2008 09:38:30 -0700, John Larkin wrote:
[re "box that will control a scientific gadget" possibly using "an
Intel-cpu SBC and a custom board" where "SBC would talk gigabit
ethernet to the customer's system and PCI to our board." with SBC
likehttp://us.kontron.com/index.php?id=226&cat=527&productid=1726

Our board would have a PCI interface driving a biggish FIFO, say 8k deep
by 48 bits wide, inside an FPGA. [...]
OK, we finally get to a question: If we run some flavor of Linux on the
SBC, what's a good strategy for keeping the fifo loaded? Assuming that
we have the recipe for an entire experimental shot in program ram, some
tens of megabytes maybe, we could...
...
3. Best, if possible: set up a single DMA transfer to do the entire
shot. That involves a dma controller that understands that the target is
sometimes busy [...]

If the linux kernel is given a "mem=n" parameter at boot time, it will use
only n bytes of memory, which leaves the balance of memory to be contiguously
allocated later with "dmabuf = ioremap(...)" (see "Allocating the DMA Buffer"
and "Do-it-yourself allocation" in Chap. 13 of Linux Device Drivers, by
Rubini and Corbet; eghttp://www.xml.com/ldd/chapter/book/ch13.html.)

If high memory isn't usable by the DMA controller, you could build a
kernel with your device driver using preallocated fixed buffers,
rather than loading the driver as a module.

User code can access the buffer as a memory-mapped file; see
eghttp://www.scs.ch/~frey/linux/memorymap.htmlfor background, and see
eghttp://linux.die.net/man/2/mmapfor notes on some flags that can lock
the mapped pages in memory, make them private, map to fixed location, etc.

4. If it's a dual-core cpu, is it hard (under Linux) to assign one cpu
to just do the fifo transfers?

Root can use cpusets, described athttp://lwn.net/Articles/127936/
to allocate cpu's and memory nodes, or can use system calls as
described inhttp://linux.die.net/man/2/sched_setaffinityto
control which cpu's given processes will run on.

Good stuff. Thanks.

Oh, Kontron assures us that the PCI connector on their sbc can run at
full 33 MHz, and doesn't share bandwidth with anything else, including
the Ethernet ports.

John

John
Looks to me that the web site: http://www.strategic-test.com that was
previously linked could be a good thing to look at. These boards in
the digital I/O mode seem just like what you want. Looks line (from
the pictures) that the actual I/O function is done via a mezzanine
board that connects into the baseboard data pumper. You should be able
to use one of their boards off the shelf and add your small FPGA
instruction decoder and data router I/O piggyback board and have a
solution that leverages SW from the board supplier. From the web site
there is claim of 1) lots of local memory right on the add-in board,
2) ready made drivers and sample code sources for Linux, and 3)
delivered data pump speed up to 125 MHz across the width of the
digital I/O.

Mike
.



Relevant Pages

  • Re: feeding a FIFO from PCI
    ... Intel-cpu SBC and a custom board" where "SBC would talk gigabit ... That involves a dma controller that understands that the target is ... only n bytes of memory, which leaves the balance of memory to be contiguously ...
    (sci.electronics.design)
  • Re: feeding a FIFO from PCI
    ... Intel-cpu SBC and a custom board" where "SBC would talk gigabit ... ethernet to the customer's system and PCI to our board." ... only n bytes of memory, which leaves the balance of memory to be contiguously ... Kontron assures us that the PCI connector on their sbc can run at ...
    (sci.electronics.design)
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