Re: ISA Bus termination question
- From: tlbs101 <tlbs101@xxxxxxxxxx>
- Date: Tue, 22 Apr 2008 14:39:16 -0700 (PDT)
On Apr 22, 11:05 am, Matt <metal...@xxxxxxxxx> wrote:
We were having an issue with a system that uses an ISA bus locking up
once every few hours. After a lot of work, we narrowed the issue down
to bus termination or lack thereof. After throwing some terminator
resistors on the ISA Bus the system runs fine for weeks. Great,
problem solved. My current task is figuring out how having no
termination caused the system to lock up after a few hours. I started
probing the clock, address lines, and data lines on the bus with and
without the termination. When there is no termination, there is a
larger overshoot and undershoot on the rising and falling edge
respectively however the delta of the termination vs. no termination
is less than a volt. I was hoping to see something a bit more drastic
but I am unsure what the threshold is on the overshoot/undershoot
voltages. Also, for grins, I did a FFT on the BCLK signal (8.333MHz)
and I noticed that the unterminated signal had well defined even
harmonics. The terminated signal had some noise around the even
harmonics but they were no where near as structured. I should also
point out the the odd harmonics on the terminated signal had a more
narrow band.
There are obvious differences in the terminated and unterminated
signals, but nothing that really stands out as the problem causing the
issue. Is there something else I should look at?
Thank you
I worked on a PC-104 (ISA) project 2 years ago. We used a commercial
PC. I developed one board (various interfaces and video) while a
fellow engineer developed another board (with a 2-channel servo motor
controller). His was 16-bit ISA and mine was 8-bit. Both used FPGAs
to decode the ISA control signals. One problem we had was noise from
his board getting on the reset line quite often -- resetting the
system every few minutes. A simple RC filter on the reset line fixed
that problem.
Another problem we had was my 8-bit board was (initially) ignoring the
BALE signal. I had to re-write my FPGA code to accomondate the 16-bit
signals (including BALE), even though my board was 8-bit.
Hopefully one of those 2 bits of info help.
Tom P.
.
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- ISA Bus termination question
- From: Matt
- ISA Bus termination question
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