Re: adding ceramics across power pins

On Fri, 25 Jul 2008 10:15:33 -0400, Phil Hobbs
<pcdhSpamMeSenseless@xxxxxxxxxxxx> wrote:

MooseFET wrote:
On Jul 25, 1:32 am, "Jon Slaughter" <Jon_Slaugh...@xxxxxxxxxxx> wrote:
Why does one have to add ceramic's across power pins along with larger caps
such as tantalum. e.g., 1uF tant an 0.1uF cer?

In theory they just add to 1.1uF and it shouldn't make any difference. It
seems that one should then also add 0.001uF and so on?

All real components have some amount of inductance. The best you can
do on inductance is limited by the mechanical size of the part. To
have a very low impedance at very high frequencies, you need the
inductance to be low and hence want a mechanically small part.

At lower frequencies, you need a lot of capacitance to make the
impedance low. This favors a large mechanical size.

It is hard to make a component that is both large and small at the
same time.

Why don't they make special "power" caps that combine tantalum and ceramics
in one package just for this purpose then?

Thanks,
Jon


Most of those sorts of recommendations IME are based on waving a dead
chicken over a circuit and having it work. Sort of like the little boy
who snapped his fingers to keep polar bears away. I've yet to see
anyone present data showing supply hash or EMI before and after diking
out the ceramics. That would make an interesting article.

Cheers,

Phil Hobbs

I know a guy who doesn't believe in using bypass caps at all, and his
stuff works too.

I occasionally design SMA connectors into real pcb's to TDR/TDT the
power planes and later measure actual operating noise. I conclude that
few multilayer boards need more than a few ceramic caps per power
pour, even if they include FPGAs and uPs and ECL. We use 2-3 ceramic
caps per power voltage on big FPGAs; some people use hundreds.

John



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