Re: power supply control
- From: Jamie Morken <jmorken@xxxxxxx>
- Date: Thu, 18 Sep 2008 04:14:59 -0700
Jamie Morken wrote:
Vladimir Vassilevsky wrote:
Jamie Morken wrote:
Hi,
I am using an FPGA to control a SMPS,
That doesn't make sense. For the small fraction of the cost of FPGA, you can have the very good DSP designed specifically for the power control applications. Especially if all glue logic and parts like ADCs, EEPROMs etc. are put into the account.
and was thinking that instead of the "standard" PID loop type control,
What is not right with the standard PID?
maybe it would be useful to control the power supply using a smarter algorithm.
Sure. Whatever algorithm can be done as the software.
For example if the components in the power supply are known (ie. inductance, capacitance, turns ratios, saturation current limits, V/us limits, etc) and also the power supply currents and voltages are sampled by the FPGA, couldn't formulas be used in the FPGA to control the power supply mathematically rather than using a direct PID type feedback loop?
You can take all of that into the account.
This way the next switch on-time could be mathematically calculated each cycle, not sure how well this would work, as the loads could be variable etc.
Software implementation of the smart control would be much simpler and cheaper then doing all of that in the hardware.
What would be a good low cost DSP capable of C code implementation of 100kHz PWM of 6 channels with 1MSPS sampling of 4 SPI ADC's (with digital lowpass filtering) and 1MSPS update of 2 SPI DAC's?
I think this would require parallel SPI buses from the DSP, as most SPI ADC's and DAC's that would work for me have max clock rate of 20MHz, unless they are all read sequentially on the same SPI bus I guess..
oops I mean read concurrently, as in use multiple MISO lines for the ADC's and one common SCLK and CS' for all ADC's.. would require multiple SPI buses still though, or else a software SPI with multiple polled MISO lines, how else could this be done in a DSP with multiple high speed SPI devices?
cheers,
Jamie
.
cheers,
Jamie
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com
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