Re: Hardening a simple op-amp circuit against EMI

Well that was an unexpectedly large number of responses... clearly
this group is very active and helpful! Tricky to respond individually
to all the helpful insights and questions, but I'll try to get the
main ones...

Bill Sloman said:
The ASCII art doesn't seem to have worked as it should have. I can
only magine that you meant

GND -10k---+---20k-----+
| |
+----|\ |
| \____|___
--100----------|+/
|/

Which is a straight-forward follower with a gain of three.

Argh. You are absolutely correct... that is a consequence of a last
minute edit to the drawings that I obviously screwed up. Sorry about
that and thanks for clarifying.

Since I completely messed up the drawing (in more ways than that), let
me do it more completely and accurately...

GND -10k---+------20k------+
| |
------ +--------|\ |
| | |\ | \____|___
| DAC|-----|+\__100_______100_________|+/
| | +--| / | |/
| | | |/ | TS921ID
| | | OP727 |
|____| |____________|


There were several informative comments about BJT op-amps being more
sensitive to RFI. The OP727 is listed as having a bipolar pnp input
stage and CMOS output stage, and the TS921ID is listed as BiCMOS.
Where is the "bi" split in BiCMOS? Is that the same as the OP7272?
ie: BJT input stage and CMOS output stage?

The info on reasons for RFI affecting the op-amp were particularly
useful. I still have some confusion as to the impact of RFI pickup at
the op-amp inputs, but I'll save that for another post.

Regarding the capacitive load on the OP727 follower which I previously
said was a unity gain buffer... the data *** says it can drive up to
500 pF loads. I always hear that the 100 Ohm load in the feedback
path helps drive capacitive loads (but again don't fully understand
why). With the addition of the RC filter in the circuit it actually
looks like below.

GND -10k---+------20k------+
| |
------ +--------|\ |
| | |\ | \____|___
| DAC|-----|+\__100_______100_________|+/
| | +--| / | | |/
| | | |/ | 1uF = TS921ID
| | | OP727 | |
|____| |____________| GND

Bill Sloman said:
It should have worked if the high-frequency interference was coming
from the output of your unity gain buffer, always assuming that the
unity gain buffer was up to driving a 1uF load;
most of them won't like it.

Is the 1 uF load still a problem in the corrected circuit drawing
above, or is the 100 Ohm in the OP727 feedback sufficient?

Bill Sloman said:
2. With the op-amp having a high input impedance, what is the reason
for limiting the resistors at the input pins to "up to a few hundred
Ohms"?

The input impedance of an op amp can be seem as a high value resistor
in parallel with a couple of pF of capacitance to ground. Your extra
resistors adds a delay around the feedback loop. If you limt the
resistance to a few hundred ohms, the extra delay is less than a
nanosecond, which is negligible. Higher resistance mean more delay,
which can wreck the stability of the negative feedback loop.

Interesting... thanks. When you say the resistor is causing a delay,
do you mean the phase change resulting from the filter created by the
serial resistor and the input capacitance?

Also - if it is delay in the feedback loop which is of concern, what
would the reason for limiting the resistor value directly on the +
input pin?

I've had trouble finding specs on the input capacitance of an op-amp
(I've seen other threads on this, too). Seems like something that
would be important to have if/when putting serial resistors in place
like recommended for RFI hardening. How high can it realistically get
when unspecified? Does it vary radically unit to unit? At something
like 5 pF, 200 Ohms limits to 150 MHz which is "ok" since I would
assume if I need that much bandwidth I better know what I'm doing
regarding the op-amps input capacitance anyway. Clearly another case
of it being better to know what you are doing rather than blindly
following a rule of thumb. Aren't they all, though.

Bill Sloman wrote:
I'm trying to simulate the impact of it all in Switchercad, but I'm a
hack and my attempts have not been that illuminating. I've spent some
time trying to work out how to simulate and understand when an
amplifier circuit is stable or not, but haven't been able to fully
grasp phase margin and certainly not how to simulate it properly.

Any help is much appreciated! I have an extreme dislike for doing
anything because "that's just how you do it" and want to understand
what is going on underneath.

Your problem is that you need to understand how your electromagnetic
interference is getting into your op amp and producing the
"misbehaviour" you are complaining aobut on the out of the amplifier.

It would help if you told us what the misbehaviour looks like, and
what the electromagnetic interference you are complaining about
consists of.

The device is in a temperature chamber and I see problems at certain
points in temperature cycling. I expect it is EMI kicking out of the
compressor when it is on.

The nature of the bad behaviour is hard to describe because we are
picking it up very indirectly and subtly in another measurement. It
is not a huge pickup, it just affects our signal of interest (a low
bandwidth LC reading elsewhere) by < 1%, but this is is quite
significant in the application. I do not see it directly in that op-
amp because it is hard to get to and measure in the setup. However -
we do know the root of the problem is in the circuit above (by
elimination). We have not yet reproduced the problem in a setup where
it is easier to both induce and measure the problem.

The usual rules of thumb are to keep the connections to the inputs of
an op amp as short as possible, and to route them over a solid ground
plane if this is at all possible.

You have to keep in mind that noise on the power supplies to an op amp
tends to appear on the output - more at high frequencies than at low
frequencies. The op amp data *** should include a plot of the Power
Supply Rejection Ratio against frequency for both the positive and the
negative power pins. I've put low pass filters on both power pins of
fast op amps to deal with this problem; in one case I tried to get
away with just a ferrite bead and a capacitor, and managed to set up a
resonant circuit, which I ended up critically damping with a small
resistor in series with the bead - ferrite beads are supposed to be
lossy inductors, but mine wasn't anywhere near lossy enough at the
frequency in question.

Thanks... I'm certainly looking at better decoupling on the supply
rails and what you say is good advice to keep in mind for the future.

Now - from lab testing yesterday (where I was rather than responding
to the thread) the following circuit change eliminates the observed
problem on a few units.

GND -10k---+------20k------+
| |
------ +--------|\ |
| | |\ | \____|___
| DAC|-----|+\__100_____12k7_____100__|+/
| | +--| / | | |/
| | | |/ | 10nF = TS921ID
| | | OP727 | |
|____| |____________| GND

The 12.7k + 10 nF RC filter was added to add some bandwidth limiting
to more what the circuit actually cares about, and the 100 Ohm was
added to the TS921ID input pin (pin lifted and stuffed under) based on
the general RFI recommendations, filtering direct-to-pin pickup with
the input capacitance of the op-amp.

I know that although it fixed the observed problem, it was hardly a
full EMC test, so it isn't where I'll leave the circuit, but that was
all I did due to time constraints and the joy of hand soldering 0402
SMT components. The circuit still needs more investigation and
testing.

eg: I still have to determine if the 10 nF will be a problem for the
OP727. It seems like not based on performance, but it is obviously
greater than the 500 pF OP727 spec and I don't know if the 100 Ohm
feedback resistor actually fixes it or why, as stated above. Although
it performs ok, is it surfing the edge of stability?

Thanks to all for your help. The goal of my post wasn't to have my
problem solved for me, but more to get a better understanding of what
the heck I'm doing and why. All the posts are certainly helping and
are much appreciated.

Russ

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