Re: "High" Voltage regulation

On May 3, 7:36 pm, John Larkin
<jjlar...@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:
On Sun, 3 May 2009 16:09:40 -0700 (PDT), James Rollins



<james.rolli...@xxxxxxxxx> wrote:
In my never ending quest for a cheap and simple high voltage
regulation I have come up with a simple dual capacitor mode. This is
similar to a Buck circuit without the inductor.

http://i41.tinypic.com/68zl03.jpg

The concept is simple: One capacitor is charging to the pre-destined
voltage while the other is discharging into the load. These are simple
RC circuits and the time constants are readily known. The load is not
connected directly to the load because it will potentially see high
transient voltages from the supply. Also the capacitors are charged at
a rate close to what it is being discharged by the load. This is to
reduce switching frequency and rise/fall times.

The switching is done with make before break on the inner two so that
the load is never disconnected from a capacitor. Alternatively one
could simply use one side with a capacitor in parallel with the load
to supply the current while the other capacitor is charging. Either
case will work but I have specific reasons for choosing the first
case.

My main concern is driving the mosfets so the gate voltage is within
spec. In fact I'm not quite sure how to do this.

My requirements is a programmable constant voltage supply from around
0 voltages to 1kV driving a load of around 100kohms to 1Mohms. The
regulation should be less than 1% or better.

From my calculations I easily get less than 0.1%. i.e., t = -R*C*ln(Vc/
V) and for R = 10^5, C = 10^(-5), Vc/V = 1 +- a/100 where a is the
percent regulation gives about 1ms for 0.1%. Hence discharging the
capacitor into the load will drop approximately 0.1% of its voltage in
1ms.

You may as well use a single series fet+resistor, pwm controlled, and
one output cap. Or just use a linear regulator. All are about equally
efficient.

John


If you don't disconnect the load there will be a voltage spike and
also a voltage dividing effect. i.e., the load is connected to the
voltage source directly and depending on the ratio of the two
resistors the load will generally see a higher voltage than you might
want. Hence the reason why the load is disconnected. If the voltage
supply resistance is too small then it requires faster rise/fall times
to quickly stop charging the capacitor as it will end up charging up
much faster.

The same problem still exists with your idea though. The fet's gate
will need to be held at a voltage that is within the source/drain of
usually around +-20V max. But if the fet is sorta "floating" I am
unsure how to accomplish such a task. At least in a way that keeps
with the simplicity of the design.

I've thought about using a simple linear regulator idea but
unfortunately similar problems as well as other problems exist. Mainly
in this case the regulation seems much poorer and it is less
efficient. Although I'm not too interested in efficiency as I am
regulation. Trying to find cost effective HV bjt's is a bit of a
problem as compared to fets.

.

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