Re: Silly resistor values

On Tue, 04 Aug 2009 17:51:52 -0700, Joerg <invalid@xxxxxxxxxxxxxxx>
wrote:

krw wrote:
On Tue, 04 Aug 2009 09:25:36 -0700, Joerg <invalid@xxxxxxxxxxxxxxx>
wrote:

Hal Murray wrote:

[...]

... Why is the power on the A gate? That just
leads to problems like this.

I'd expect it to be on a separate symbol or "gate" or whatever
you call them. Another option is that power is connected automagically,
but then you need a way to override that when you are doing fancy
things.

In my case there are mainly two reasons:

a. The device must have its personal regulator/filter/whatever and other
engineers and also technicians need to understand that. This is much
easier when present at the symbol. Otherwise they might draw the wrong
conclusions like "Oops, +12V is missing, lets take the main power supply
apart" while in reality the local regulator was gated off for some reason.

That's a special case and I'd agree a more "local" power distribution
would help. OTOH, in our designs the regulators are "globally" (on
the board) controlled.


Ok, then 80% of my designs are special cases :-)

I don't think anyone here would argue that. ;-)

b. I often have situations where, say, an opamp or comparator switches
the supply of another. This can become next to impossible to understand
by other engineers, especially younger ones.

In our case there is always a PIC in the middle. I don't know how to
show the power control code on the schematic. ;-)


So far I never had a PIC in the middle ...

When I first wrote "PIC" I was kidding; the answer to every question
is "PIC". The fact is that we do have a PIC in the middle, on top of
a DSP.

Cadsoft Eagle allows a very nice flexibility here: You can call up the
power pins via the "invoke" command. The CAD symbol is usually drawn so
it slides over the A-device (or another if you wish) and fits as if it
was part of the symbol. You can also place it near the group in the
schematic, or down at the bottom for simpler architectures. That's how
it ought to be, gives the designer all the freedom.

That sounds like it solves all the problems.


Sure does. That CAD program is very close to perfect. With one major
deficiency and that makes it IMHO useless for any larger design: No
hierarchical *** structure :-(

Monday we had the design review for the widget I'm working on. My
boss really liked the hierarchical (turtles all the way down)
organization. I'm not so sure about the other hardware engineer
though. ;-) I'm still not to where I can easily determine where to
add a hierarchical block or another *** though. More than one block
for a component (FPGA) just seems wrong.
.

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