Re: A small rant about the 555 :-)
- From: John Fields <jfields@xxxxxxxxxxxxxxxxxxxxx>
- Date: Mon, 23 Nov 2009 14:20:52 -0600
On Mon, 23 Nov 2009 21:30:13 +0530, "pimpom" <pimpom@xxxxxxxxxxx> wrote:
MooseFET wrote:
On Nov 22, 1:58 pm, "pimpom" <pim...@xxxxxxxxxxx> wrote:
The people who designed the 555 timer should be given medals
for
coming up with a deceptively simple device that is still
seeing
so much use after nearly four decades. They also deserve to be
tarred and feathered for the pin-out configuration. :-)
I don't know about you others, but I shudder every time I want
to
draw a schematic with the pins of the 555 in their relative
positions as well as when I need to design a pcb for it.
And with that, I'm going to bed. It's almost 3:30 am here.
Good
night.
I've never had trouble arranging the connections of the LM555.
The 8
pin DIP doesn't contain enough "corner paint" to cause major
concerns. There are lots of other chips that are more trouble
to lay
out.
I didn't really mean that it's a "major" problem. What I meant
was that, for a simple circuit serving a simple purpose, albeit a
useful and versatile one, the illogical placement of pins makes
things more difficult than they could be.
For example, if pin 8 is Vcc, it would be better if ground was 5,
and the control voltage terminal at 4. Then connecting the bypass
cap from pin 4 would also be easier. Since the reset pin is often
tied to Vcc, it could be allocated to pin 1. It wouldn't cause a
problem with external triggering. I'd also interchange 2 and 3 -
that will make a straight track from 2 to 6 in astable mode. So
this is what I'd do:
_________
Reset 1-| |-8 Vcc
| |
Output 2-| |-7 Discharge
| |
Trigger 3-| |-6 Threshold
| |
Control 4-|_______|-5 Gnd
Of course, all this is academic since the 555 has been around as
it is for almost 40 years. But just visuallise drawing a
schematic or designing a pcb with my mythical IC. I think you'll
find that it's much easier.
---
Not trying to be unkind, but since the pinout is cast in stone it makes
no difference whether your pinout scheme would be better or not.
What does make sense is to draw your schematic in a way that makes the
operation of the device simple to visualize; inputs on the left and top,
outputs on the right and bottom whenever possible, and to let the pinout
fall where it may.
For example: (View in Courier)
In this example of an astable, to keep the part symmetrical and because
they're not used for anything, I put the RESET\ and VC pins on the
right, along with the output, and the important frequency and
pulse-width inputs on the left.
VCC and GND are located at the top and bottom, as is the convention for
power wiring.
Easy to read, yes?
VCC>--+----------------------+----------+
| |8 |
[12K] +----+----+ |
| |_ Vcc | |
+--------------7-O|D VC|-5- |
| | _| |
+---[470K]---+--6-|TH R|O-4--+
| | |__ | |
+-[1N4148>]--+-2-O|TR OUT|-3---|--->OUT
| | GND | |
[C] +----+----+ [0.1µF]
| |1 |
GND>---------------+---------+----------+
_ _
OUT____| |_____________________| |____
-->| |<--1ms
|<----------33ms------->|
Here's a monostable being triggered by a momentary switch and driving an
LED.
+V>----+-----------+------+-------+--------+---------------+
| | |K | |8 |
[10K] [100K] [1N4148] [100K] +---+---+ |
| | | | |_ Vcc | |
+--[0.1µF]--+------+-------|-2-O|T OUT|-3--+ |
| | | | | |
| +-6--|TH | [R] |C1
| O | |_ 555| | [0.1µF]
S1-->| +-7-O|D | [LED] |
| O | | GND | |K |
| [10µF] +---+---+ | |
| | |1 | |
GND>---+--------------------------+--------+--------+------+
JF
.
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