Re: The reason of implementation of morphological operator in FPGA
- From: Richard Herring <junk@[127.0.0.1]>
- Date: Tue, 29 Nov 2005 10:50:18 +0000
In message <1133243655.314911.129840@xxxxxxxxxxxxxxxxxxxxxxxxxxxx>, TMU <m.hajirahimi@xxxxxxxxx> writes
hi I have studied some papers of implementation of morphological operator in FPGA and ASIC. I want to know the reason of implementation of morphological operator in FPGA. Does FPGA implementation use only in test of our design? and what is the meaning of realtime processing? (the required speed of chip) can anyone help me?
You are in the wrong newsgroup. sci.lang is for discussion of ( (natural) languages and linguistics. You'd be better off finding a group in the comp.* hierarchy - maybe comp.arch.fpga ?
-- Richard Herring .
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