Re: The reason of implementation of morphological operator in FPGA
- From: "Peter T. Daniels" <grammatim@xxxxxxxxxxxxxxxx>
- Date: Tue, 29 Nov 2005 15:32:33 GMT
Richard Herring wrote:
>
> In message <1133243655.314911.129840@xxxxxxxxxxxxxxxxxxxxxxxxxxxx>, TMU
> <m.hajirahimi@xxxxxxxxx> writes
> >hi
> >I have studied some papers of implementation of morphological operator
> >in FPGA and ASIC.
> >I want to know the reason of implementation of morphological operator
> >in FPGA.
> >Does FPGA implementation use only in test of our design?
> >and what is the meaning of realtime processing? (the required speed of
> >chip)
> >can anyone help me?
>
> You are in the wrong newsgroup. sci.lang is for discussion of (
> (natural) languages and linguistics. You'd be better off finding a group
> in the comp.* hierarchy - maybe comp.arch.fpga ?
That was the same poster who asked about "asic" yesterday. From the
header I thought it was asking about Basic English, but the message
contained the above sort of gobbledygook.
--
Peter T. Daniels grammatim@xxxxxxx
.
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